This significant progress in quantum error correction (QEC) greatly reduces the time required for error detection and correction, marking an essential step towards the creation of scalable and practical quantum computers.
The breakthrough was showcased on QpiAI’s 64-qubit Kaveri superconducting quantum processor. The company claims that the new decoder reduces the error correction time from tens of microseconds with traditional software to about 1.5 microseconds per cycle.
This enhancement tackles one of the primary challenges in quantum computing, where rapid error correction is required within the brief coherence time of qubits. The platform utilizes a distance-5 rotated surface code involving 49 physical qubits.
Each decoder functions on a dedicated Kaveri quantum processing unit (QPU), facilitating efficient decoding and seamless integration with existing quantum hardware for real-time performance.
QpiAI’s founder and CEO, Nagendra Nagaraja, stated that the platform illustrates a realistic pathway to hardware-accelerated quantum error correction, minimizing the dependence on conventional computing systems like CPUs and GPUs.
“The performance of our new decoder platform showcases a feasible path towards scalable, hardware-accelerated quantum error correction. It is compatible with widely used superconducting transmon qubits, reducing the necessity for additional classical support from CPUs and GPUs,” he remarked.
The company is also developing next-generation error correction techniques specifically designed for its own fluxonium-based qubits as well as architectures meant for distributed systems,” Nagaraja added.
This project has garnered partial backing from India’s National Quantum Mission. Dr. Abhay Karandikar, Secretary of the Department of Science and Technology (DST), highlighted that QpiAI has reached a significant milestone in the propagation of quantum technologies. This progress aligns with the government’s national initiative for advancing quantum technologies.
Why it’s important
He emphasized that hardware-based error correction is vital for enhancing large-scale quantum computing capabilities within the country.
“Through the implementation of distance-5 surface code QEC in custom hardware instead of traditional CPUs, QpiAI is hastening the deployment of its 64-qubit Kaveri QPU in India, representing a major leap toward practical large-scale quantum utility,” Karandikar noted.
Apart from its high-speed decoder, QpiAI’s quantum processors feature error-correction architecture and optimized layouts and fabrication methods for superconducting quantum processors. The decoder platform also leverages QpiAISense quantum control electronics, facilitating the scalable development of quantum processors that contribute to fault-tolerant quantum computing.
The decoder platform permits multiple rounds of stabilizer measurements in each cycle, enabling the detection of both qubit and measurement errors. With coherence times achieving 100 microseconds (T1) and 95 microseconds (T2), the platform supports numerous error correction cycles before errors accumulate, improving overall computational reliability.
The company intends to demonstrate the technology in the upcoming months, including at its facilities in the United States.
